1. Technical Field
The present invention relates to a semiconductor integrated circuit device and more particularly to a semiconductor integrated circuit device having a 6F2 layout.
2. Description of the Related Art
Various methods have been suggested for increasing the integration density of semiconductor integrated circuit devices in order to increase the yield of the semiconductor integrated circuit devices. For example, reducing the design rule or modifying existing memory cell structures could both result in increased integration density for a semiconductor integrated circuit device. In particular, the existing 8F2 layout could be replaced by a 6F2 layout for the purpose of enhancing the integration density. Since the 6F2 layout can reduce the size of unit memory cells to ¼ of the size of memory cells in the 8F2 layout, the 6F2 layout is more suitable than the 8F2 layout when manufacturing highly integrated semiconductor integrated circuit devices. However, it is difficult to enhance productivity using the 6F2 layout due to its structural weakness and close tolerances.